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SC183C
POWER MANAGEMENT Features

2.5MHz, 2A Synchronous Step-Down Regulator
Description
The SC183C is a 2A synchronous step-down regulator designed to operate with an input voltage range of 2.9 to 5.5 Volts. The device offers fifteen pre-determined outputs voltages via four control pins programmable from 0.8 to 3.3 Volts. The control pins allow for on-the-fly voltage changes, enabling system designers to implement dynamic power savings. The SC183C is also capable of adjusting output voltage via an external resistor divider. The device operates with a fixed 2.5MHz oscillator frequency, allowing the use of small surface mount external components. Connecting CTL0 -- CTL3 to logic low forces the device into shutdown mode reducing the supply current to less than 1A. Connecting any of the control pins to logic high enables the converter and sets the output voltage according to Table 1. Other features include undervoltage lockout, soft-start to limit in-rush current, and over-temperature protection. The SC183C is available in a thermally-enhanced, 3mm x 3mm x 0.6mm MLPQ-UT16 package and has a rated temperature range of -40 to +85C.
VIN Range: 2.9 - 5.5V VOUT Options: 0.8 - 3.3V Up to 2A Output Current Ultra-Small Footprint, <1mm Height Solution 2.5MHz Switching Frequency Efficiency Up to 93% Low Output Noise Across Load Range Excellent Transient Response Start Up into Pre-Bias Output 100% Duty-Cycle Low Dropout Operation <1A Shutdown Current Internal Soft Start Input Under-Voltage Lockout Output Over-Voltage, Current Limit Protection Over-Temperature Protection Adjustable Output Voltage 3mm x 3mm x 0.6mm thermally enhanced MLPQ-UT16 package -40 to +85C Temperature Range Pb-free, Halogen free, and RoHS/WEEE compliant
Applications

Office Automation and Computing Set-Top Box LCD TV Network Cards Printer
Typical Application Circuit
VIN CIN 10F RAVIN 10 CAVIN 1F CTL0 CTL1 CTL2 CTL3 CTL0 CTL1 CTL2 CTL3 PGND AGND PVIN LX L 1.0H VOUT 1.50V / 2.0A COUT 22F
SC183C
AVIN VOUT
July 28, 2010
SC183C
Pin Configuration
PGND
Ordering Information
Device
SC183CULTRT(2)(3) SC183CEVB(4)
Package
3mm x 3mm x 0.6mm MLPQ-UT16 Evaluation Board
LX
15
LX
16
LX
14
13 12 11 10
PVIN PVIN AGND AVIN
1 2 3 4 5
TOP VIEW
PGND PGND VOUT NC
Notes: (1) Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (2) Available in tape and reel only. A reel contains 3,000 devices. (3) Device is Pb-free, Halogen free, and RoHS/WEEE compliant. (4) Please specify the VOUT when ordering.
T
6 7 8
9
CTL1
3mm x 3mm x 0.6mm MLPQ-UT16 JA = 40C/W (1)
CTL0
CTL2
CTL3
Table 1 - Output Voltage Settings
CTL3 0 CTL2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 CTL1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 CTL0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output Voltage Shutdown 0.80 1.00 1.025 1.05 1.20 1.25 1.30 1.50 1.80 2.20 2.50 2.60 2.80 3.00 3.30
Marking Information
0 0 0 0 0 0 0 1 1 1
Marking for 3mm x 3mm MLPQ-UT 16 Lead Package: yyww = Datecode (Example: 0852) xxxx = Semtech Lot number (Example: E901)
1 1 1 1 1
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SC183C
Absolute Maximum Ratings
PVIN and AVIN Supply Voltages ..................... -0.3 to 6.0V LX Voltage .............. -1 to PVIN+1V, -3V (20ns Max), 6V Max VOUT Voltage ................................. -0.3 to AVIN+0.3V CTLx Voltage ................................. -0.3 to AVIN+0.3V Peak IR Reflow Temperature ............................... 260C ESD Protection Level(2) ........................................ 2.5kV
Recommended Operating Conditions
Supply Voltage PVIN and AVIN ........................ 2.9 to 5.5V
Maximum Output Current ....................................... 2.0A
Temperature Range ................................. -40 to +85C Input Capacitor ................................................ 10uF Output Capacitor ............................................. 22uF Output Inductor ............................................. 2.2uH
Thermal Information
Thermal Resistance, Junction to Ambient(1) ............ 40 C/W Maximum Junction Temperature ........................ +150C Storage Temperature Range ..................... -65 to +150 C
Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES: (1) Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (2) Tested according to JEDEC standard JESD22-A114-B.
Electrical Characteristics
Unless specified: PVIN= AVIN= 5.0V, VOUT= 1.50V, CIN= 10F, COUT= 22F, L= 2.2H, -40C TJ +125 C. Unless otherwise noted typical values are TA= +25 C.
Parameter
Under-Voltage Lockout Output Voltage Tolerance(1) Current Limit Supply Current Shutdown Current High Side Switch Resistance
Symbol
UVLO
Conditions
Rising AVIN, PVIN=AVIN Hysteresis
Min
2.70 240 -2.0 2.5
Typ
2.80 300
Max
2.90
Units
V mV
VOUT ILIMIT IQ ISHDN RDSON_P
PVIN= AVIN= 2.9 to 5.5V; IOUT=0A Peak LX current No load CTL0-3= AGND ILX= 100mA, TJ= 25 C ILX= 100mA, TJ= 125 C ILX= -100mA, TJ= 25 C ILX= -100mA, TJ= 125 C PVIN= AVIN= 5.5V; LX= 0V; CTL0-3= AGND PVIN= AVIN= 5.5V; LX= 5.0V; CTL0-3= AGND PVIN= AVIN= 5.0V; IOUT=1mA to 2A
+2.0 3.0 10 1 0.10 0.14 0.09 0.125 1 10 0.125 0.18 0.115 0.160 10 3.75
% A mA A
Low Side Switch Resistance(2)
RDSON_N
LX Leakage Current(2) Load Regulation Oscillator Frequency Soft-Start Time
(2)
ILK(LX) VLOAD-REG fOSC tSS IEN_HI IEN_LO
-10
-1 0.5 1.0 2.875 980 2.0 2.0
A % MHz s A A
2.125 IOUT= 0 to 2A CTL0-3=AVIN CTL0-3=AGND 50 -2.0 -2.0
2.500 850
CTLx Input High Current(2) CTLx Input Low Current
(2)
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SC183C
Electrical Characteristics (continued)
Parameter
CTLx Input High Threshold CTLx Input Low Threshold VOUT Over Voltage Protection Thermal Shutdown Temperature Thermal Shutdown Hysteresis
Symbol
VEN_HI VEN_LO VOVP TSD TSD_HYS
Conditions
Min
1.2
Typ
Max
Units
V
0.4 110 115 160 10 120
V % C C
Notes: (1) The "Output Voltage Tolerance" includes output voltage accuracy, voltage drift over temperature and the line regulation. (2) The negative current means the current flows through into the pin and the positive current means the current flows through out from the pin.
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SC183C
Typical Characteristics
Circuit Conditions: CIN= 10mF/6.3V, COUT= 22mF/6.3V. Unless otherwise noted, L= 2.2mH (TOKO: 1127AS-2R2M).
Efficiency Efficiency vs. Load Current (VOUT=1.5V) 100% 100% Efficiency Efficiency vs. Load Current (VOUT=3.3V)
L=1127AS-2R2 (40m_typ)
95% 90% 95%
L=1127AS-2R2 (40m_typ)
L=1071AS-1R0 (33m_typ)
90%
Efficiency (%)
85% 80% 75% 70% 65% 60% 0.0 0.4 0.8 1.2 Output Current (A) 1.6 2.0
Efficiency (%)
85%
L=1071AS-1R0 (33m_typ)
80% 75% 70%
L=1071AS-2R2 (50m_typ)
VIN= 5.0V VOUT= 1.5V TA=25 C
L=1071AS-2R2 (50m_typ)
65% 60% 0.0
VIN= 5.0V VOUT= 3.3V TA=25 C
0.4 0.8 1.2 Output Current (A) 1.6 2.0
Total Loss vs. Load Current (VOUT=1.5V) Total Loss
1000 1000
Total Loss vs. Load Current (VOUT=3.3V)
Total Loss
800
VIN= 5.0V VOUT= 1.5V TA=25 C
L=1071AS-2R2 (50m_typ)
800
VIN= 5.0V VOUT= 3.3V TA=25 C
L=1071AS-2R2 (50m_typ)
Loss (mW)
Loss (mW)
600
600
L=1071AS-1R0 (33m_typ)
400
L=1071AS-1R0 (33m_typ)
400
200
200
L=1127AS-2R2 (40m_typ)
0 0.0 0.4 0.8 1.2 Output Current (A) 1.6 2.0 0 0.0 0.4
L=1127AS-2R2 (40m_typ)
0.8 1.2 Output Current (A) 1.6 2.0
Load Regulation (VOUT=1.5V) Load Regulation
0.5% 0.4% 0.3% 0.2% 0.5%
Load Regulation (VOUT=3.3V) Load Regulation
0.4% 0.3% 0.2%
VOUT= 1.5V TA=25 C
VIN= 5.0V VOUT= 3.3V TA=25 C
Load Regulation
Load Regulation
0.1% 0.0% -0.1% -0.2% -0.3% -0.4% -0.5% 0.0 0.4 0.8 1.2 Output Current (A) 1.6 2.0
0.1% 0.0% -0.1% -0.2% -0.3%
VIN= 3.3V
VIN= 5.0V
-0.4% -0.5% 0.0 0.4 0.8 1.2 1.6 2.0 Output Current (A)
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SC183C
Typical Characteristics
Circuit Conditions: CIN= 10mF/6.3V, COUT= 22mF/6.3V. Unless otherwise noted, L= 2.2mH (TOKO: 1127AS-2R2M).
RDS(ON)RDSON (P & N) Variation over Line Variation vs. Input Voltage
30% 25% 20% 15% 20% 15%
RDSON (P & N) Variation Over Temperature RDS(ON) Variation vs. Temperature
VIN= 5.0V ILX= 100mA
P-Channel
10% 5%
Variation
Variation
10% 5% 0% -5% -10% 2.5 3.0 3.5 4.0 Input Voltage (V) 4.5 5.0 5.5
0% -5% -10%
N-Channel
ILX= 100mA TA= 25 C
N-Channel
-15% -20% -40 -15
P-Channel
10
35
60
85
Ambient Temperature ( C)
Switching Frequency Variation over Line Switching Frequency vs. Input Voltage 5% 4% 3% 2% 1.0% 0.8%
Switching Frequency vs. Temperature Switching Frequency Variation
VOUT= 3.3V
0.6% 0.4%
Variation
0% -1% -2% -3% -4% -5% 2.5 3.0 3.5 4.0 Input Voltage (V) 4.5 5.0 5.5
Variation
VOUT= 1.5V IOUT= 0A TA= 25 C
1%
0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0% -40 -15 10 35 60 85 Ambient Temperature ( C)
VIN= 5.0V IOUT= 0A
LineRegulation ove Line Line Regulation
1.0% 0.8% 0.6% 0.4% 1.0% 0.8% 0.6%
Line Regulation vs. Temperature Line Regulation over Temperature
VOUT= 1.5V
0.4%
Regulation
0.0% -0.2% -0.4% -0.6% -0.8% -1.0% 2.5 3.0 3.5 4.0 Input Voltage (V) 4.5 5.0 5.5
Regulation
VOUT= 3.3V IOUT= 0A TA= 25 C
0.2%
0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0% -40 -15 10 35 60 85 Ambient Temperature ( C)
VOUT= 1.5V IOUT= 0A
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SC183C
Typical Characteristics
Circuit Conditions: CIN= 10mF/6.3V, COUT= 22mF/6.3V. Unless otherwise noted, L= 2.2mH (TOKO: 1127AS-2R2M).
UVLOUVLO Rising Threshold Variation Rising Threshold Variation
1.0% 0.8% 0.6% 0.4% Variation Variation 0.2% 0.0% -0.2% -0.4% -0.6% -0.8% -1.0% -40 -15 10 35 60 85 Ambient Temperature ( C) 5% 4% 3% 2% 1% 0% -1% -2% -3%
UVLO Hysteresis Variation UVLO Hysteresis Variation
IOUT= 0A
-4% -5% -40
IOUT= 0A
-15 10 35 60 85
Ambient Temperature ( C)
Dropout Voltage in 100% Duty Cycle Operation
500 450 400
TA= 25 C
L= 1071AS-2R2M (DCR= 60m_max)
Dropout Voltage (mV)
350 300 250 200 150 100 50 0 0.0
L= 1127AS-2R2M (DCR=48m_max)
0.4
0.8
1.2
1.6
2.0
Output Current (A)
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SC183C
Typical Waveforms
Circuit Conditions: CIN= 10mF/6.3V, COUT= 22mF/6.3V, L= 2.2mH (TOKO: 1127AS-2R2M).
Output Voltage Ripple (VOUT=1.5V)
VOUT 10mV/div
Output Voltage Ripple (VOUT=1.5V)
Output Voltage Ripple (VOUT=1.5V)
VOUT 10mV/div
Output Voltage Ripple (VOUT=1.5V)
ILX 1A/div
ILX 1A/div
VLX 2V/div
VIN=3.3V IOUT=2A
VLX 2V/div 500ns/div
VIN=5.0V IOUT=2A
500ns/div
Output Voltage Ripple (VOUT=3.3V)
VOUT 10mV/div
Output Voltage Ripple (VOUT=3.3V)
Output Voltage Ripple (VOUT=3.3V)
Output Voltage Ripple (VOUT=3.3V)
VOUT 10mV/div ILX 0.5A/div ILX 1A/div
VLX 2V/div
VIN=5.0V IOUT=0A
VLX 2V/div 500ns/div
VIN=5.0V IOUT=2A
500ns/div
Transient Response (VOUT=1.5V; 0A to 1A)
Transient Response (VOUT=1.5V)
Transient Response (VOUT=3.3V; 0A to 1A)
Transient Response (VOUT=3.3V)
100mV/div
VOUT
100mV/div
VOUT
1A/div
IOUT
500mA/div
IOUT
VIN=5.0V IOUT=0A to 1A
50s/div
VIN=5.0V IOUT=0A to 1A
50s/div
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SC183C
Typical Waveforms
Circuit Conditions: CIN= 10mF/6.3V, COUT= 22mF/6.3V, L= 2.2mH (TOKO: 1127AS-2R2M).
Start Up (Enable)(VOUT=1.5V)
Start Up (VOUT=1.5V)
Start Up (Enable)(VOUT=1.5V)
Start Up (VOUT=1.5V)
2V/div
VIN
2V/div
VIN
2V/div
VEN
2V/div
VEN
0.5V/div
VOUT
0.5V/div
VOUT
VIN=5.0V ROUT=1k
50s/div
VIN=5.0V ROUT=0.75 (2A)
200s/div
Start Up (Power up VIN) (VOUT=1.5V)
Start Up (VOUT=1.5V), EN=VIN
Start Up (Power up VIN) (VOUT=1.5V)
Start Up (VOUT=1.5V), EN=VIN
2V/div
VIN
2V/div
VIN
0.5V/div
VOUT
0.5V/div
VOUT
VIN=5.0V ROUT=1k
200s/div
VIN=5.0V ROUT=0.75 (2A)
200s/div
Start Up (Enable)(VOUT=3.3V)
Start Up (VOUT=3.3V)
Start Up (Enable)(VOUT=3.3V)
Start Up (VOUT=3.3V)
2V/div
VIN
2V/div
VIN
2V/div
VEN
2V/div
VEN
1V/div
VOUT
1V/div
VOUT
VIN=5.0V ROUT=1k
100s/div
VIN=5.0V ROUT=1.65 (2A)
200s/div
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SC183C
Typical Waveforms
Circuit Conditions: CIN= 10mF/6.3V, COUT= 22mF/6.3V, L= 2.2mH (TOKO: 1127AS-2R2M).
Start Up (Power up VIN) (VOUT=3.3V)
Start Up (VOUT=3.3V), EN=VIN
Start Up (Power up VIN) (VOUT=3.3V)
Start Up (VOUT=3.3V), EN=VIN
2V/div
VIN
2V/div
VIN
1.5V/div
VOUT
1.5V/div
VOUT
VIN=5.0V ROUT=1k
200s/div
VIN=5.0V ROUT=1.65 (2A)
200s/div
Shutdown-Disable (1.5V)
Shutdown (Disable)(VOUT=1.5V)
Shutdown (Disable)(VOUT=3.3V)
Shutdown-Disable (3.3V)
2V/div
VIN
2V/div
VIN
2V/div
VEN
2V/div
VEN
1V/div
VOUT
1.5V/div
VOUT
VIN=5.0V ROUT=1.5
200s/div
VIN=5.0V ROUT=3.3
200s/div
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SC183C
Pin Descriptions
Pin #
1,2 3 4
Pin Name
PVIN AGND AVIN
Pin Function
Input supply voltage for the converter power stage. Ground connection for the internal circuitry. AGND needs to be connected to PGND directly. Power supply for the internal circuitry. Connect a 10W resistor to PVIN and a 1mF capacitor to AGND. Control bit 0 - see Table 1 for decoding. This pin has a 1 M internal pulldown resistor. This resistor is switched in circuit whenever the EN pin is below the enable input high threshold, or when the part is in undervoltage lockout. Control bit 1 - see Table 1 for decoding. This pin has a 1 M internal pulldown resistor. This resistor is switched in circuit whenever the EN pin is below the enable input high threshold, or when the part is in undervoltage lockout. Control bit 2 - see Table 1 for decoding. This pin has a 1 M internal pulldown resistor. This resistor is switched in circuit whenever the EN pin is below the enable input high threshold, or when the part is in undervoltage lockout. Control bit 3 - see Table 1 for decoding. This pin has a 1 M internal pulldown resistor. This resistor is switched in circuit whenever the EN pin is below the enable input high threshold, or when the part is in undervoltage lockout. No connection. Output voltage sense pin. Ground connection for converter power stage. Switching node - connect an inductor between this pin and the output capacitor.
5
CTL0
6
CTL1
7
CTL2
8 9 10 11,12,13 14,15,16
CTL3 NC VOUT PGND LX
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SC183C
Block Diagram
Current Amp
AVIN
Plimit Comp Plimit Amp
PVIN
Oscillator & Slope Generator Control Logic LX
VOUT CTL0 CTL1 CTL2 CTL3 Voltage Select
Error Amp 500mV Ref PWM Comp
PGND
AGND
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SC183C
Applications Information
Detailed Description
The SC183C is a synchronous step-down converter utilizing a 2.5MHz fixed frequency voltage mode architecture. The switching frequency is chosen to minimize the size of the external inductor and capacitors while maintaining high efficiency. an external resistor divider. There will be a typical 2A current flowing into the VOUT pin. The typical schematic for an adjustable output voltage option from the standard 1.0V with CTLx=[0010], is shown in Figure 1. RFB1 and RFB2 are used to adjust the desired output voltage. If the RFB2 current is such that the 2A VOUT pin current can be ignored, then RFB1 can be found by Equation 1. RFB2 needs to be low enough in value for the current through the resistor chain to be at least 20A in order to ignore the VOUT pin current.
RFB1 = VOUT - VOSTD RFB 2 VOSTD
Operation
During normal operation, the PMOS MOSFET is activated on each rising edge of the internal oscillator. The voltage feedback loop uses an internal feedback resistor divider. The period is set by the internal oscillator. The device has an internal synchronous NMOS rectifier and does not require a Schottky diode on the LX pin. The device operates as a buck converter in PWM mode with a fixed frequency of 2.5MHz.
(1)
Programmable Output Voltage
The SC183C has fifteen pre-determined output voltage values which can be individually selected by programming the CTL input pins (see Table 1 -- Output Voltage Settings). Each CTL pin has an active 1 M internal pulldown resistor. The 1M resistor is switched in circuit whenever the CTL input voltage is below the input threshold, or when the part is in undervoltage lockout. It is recommended to tie all high CTL pins together and use an external pull-up resistor to AVIN if there is no enable signal or if the enable input is an open drain/collector signal. The CTL pins may be driven by a microprocessor to allow dynamic voltage adjustment for systems that reduce the supply voltage when entering sleep states. Avoid all zeros being present on the CTL pins when changing programmable output voltages as this would disable the device. SC183C is also capable of regulating a different (higher) output voltage, which is not shown in the Table 1, via
L VIN CIN 10F RAVIN
10
where VOSTD is the pre-determined output voltage via the CTL pins. CFF is needed to maintain good transient response performance. The correct value of C FF can be found using Equation 2.
C FF [nF ] = 2.5 x
(VOUT - 0.5)2 VOSTD ) x( RFB1[k] (VOUT - VOSTD ) VOSTD - 0.5
(2)
To simplify the design, it is recommended to program the desired output voltage from a standard 1.0V as shown in Figure 1 with a proper CFF calculated from Equation 2. For programming the output voltage from other standard voltages, RFB1, RFB2 and CFF need to be adjusted to meet Equation 1and 2.
Protection Features
The SC183C provides the following protection features:
PVIN
LX COUT RFB1 VOUT CFF
VOUT
SC183C
AVIN
CAVIN 1F
* * * *
Current Limit Over-Voltage Protection Soft-Start Operation Thermal Shutdown
CTL0 Enable CTL1 CTL2 CTL3 PGND AGND
10k
RFB2
RFB1 = (VOUT - 1) x RFB 2
for CTLx= 0010 (1.0V)
Current Limit
The internal PMOS power device in the switching stage is protected by a current limit feature. If the inductor current is above the PMOS current limit for 16 consecutive cycles, the part enters foldback current limit mode and the output current is limited to the current limit holding
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Figure 1 -- Typical Schematic for Adjusting the Output Voltage Up from an Output Voltage of 1.0V (CTLx=[0010])
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SC183C
Applications Information (continued)
current (ICL_HOLD) of a few hundred milliampere. Under this condition, the output voltage will be the product of ICL_HOLD and the load resistance. The current limit holding current (ICL_HOLD) will decrease when the output voltage increases. The load presented must fall below the current limit holding current for the part to exit foldback current limit mode. Figure 2 shows how the typical current limit holding current varies with output voltage. The SC183C is capable of sustaining an indefinite short circuit without damage and will resume normal operation when the fault is removed. The foldback current limit mode is disabled during soft-start. The current limit functionality is shown in Figure 4. maintained for 200s following an internal reference start up of 50s giving a total nominal startup period of 850s. During startup, the chip operates by controlling the inductor current swings between 0A and current limit. If at any time VOUT reaches 86% of the target or at the end of the soft-start period, the SC183C will switch to PWM mode operation. Figure 3 shows the typical diagram of soft start operation. The SC183C is capable of starting up into a pre-biased output. When the output is precharged by another supply rail, the SC183C will not discharge the output during the soft start interval.
Shut Down
Current Limit Holding Current over Vout 300
TA= 25 C
Current Limit Holding Current (mA) 250
VIN= 3.6V VIN= 5.0V
When all CTL pins are low, the SC183C will run in shutdown mode, drawing less than 1A from the input power supply. The internal switches and bandgap voltage will be immediately turned off.
200
150
Thermal Shutdown
The device has a thermal shutdown feature to protect the SC183C if the junction temperature exceeds 160C. During thermal shutdown, the on-chip power devices are disabled, tri-stating the LX output. When the temperature drops by 10C, it will initiate a soft start cycle to resume normal operation.
100
50
VIN= 3.3V
0 1.0 1.5 2.0 2.5 3.0 3.5 Output Voltage (V)
Figure 2 -- Typical Current Limit Holding Current
Inductor Selection
The SC183C converter has internal loop compensation. The compensation is designed to work with a output filter corner frequency of less than 40kHz for a VIN of 5V and 50kHz for a VIN of 3.3V over any operating condition. The corner frequency of the output filter can be defined by Equation 3.
fC = 1 2 L COUT
(3)
Over-Voltage Protection
In the event of a 15% over-voltage on the output, the PWM drive is disabled with LX pin floating.
Soft-Start
The soft-start mode is activated after AVIN reaches its UVLO and one or more CTL pins are set high to enable the part. A thermal shutdown event will also activate the soft start sequence. Soft-start mode controls the maximum current during startup thus limiting in-rush current. The PMOS current limit is stepped through four soft start levels of approximately 20%, 25%, 40%, & 100%. Each step is
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Values outside this range may lead to instability, malfunction, or out-of-specification performance. In general, the inductance is chosen by making the inductor ripple current to be less than 30% of maximum load current. When choosing an inductor, it is important to consider the change in inductance with DC bias current.
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SC183C
Applications Information (continued)
The inductor saturation current is specified as the current at which the inductance drops a specific percentage from the nominal value. This is approximately 30%. Except for short-circuit or other fault conditions, the peak current must always be less than the saturation current specified by the manufacturer. The peak current is the maximum load current plus one half of the inductor ripple current at the maximum input voltage. Load and/or line transients can cause the peak current to exceed this level for short durations. Maintaining the peak current below the inductor saturation specification keeps the inductor ripple current and the output voltage ripple at acceptable levels. Manufacturers often provide graphs of actual inductance and saturation characteristics versus applied inductor current. The saturation characteristics of the inductor can vary significantly with core temperature. Core and ambient temperatures should be considered when examining the core saturation characteristics. When the inductance has been determined, the DC resistance (DCR) must be examined. The efficiency that can be achieved is dependent upon the DCR of the inductor. Lower values give higher efficiency. The RMS DC current rating of the inductor is associated with losses in the copper windings and the resulting temperature rise of the inductor. This is usually specified as the current which produces a 40C temperature rise. Most copper windings are rated to accommodate this temperature rise above maximum ambient. Magnetic fields associated with the output inductor can interfere with nearby circuitry. This can be minimized by the use of low noise shielded inductors which use the minimum gap possible to limit the distance that magnetic fields can radiate from the inductor. However shielded inductors typically have a higher DCR and are thus less efficient than a similar sized non-shielded inductor. Final inductor selection depends upon various design considerations such as efficiency, EMI, size, and cost. Table 2 lists the manufacturers of recommended inductor options. The saturation characteristics and DC current ratings are also shown.
Manufacturer Part Number TOKO 1071AS-2R2M TOKO 1071AS-1R0N TOKO 1127AS-2R2M Panasonic ELLVGG1R0N DCR Max () Rated Current (A) 1.80 2.70 2.50 2.20 L at Rated Current (H) 1.54 0.70 1.54 0.70 Dimensions LxWxH (mm) 2.8x3.0x1.5 2.8x3.0x1.5 3.5x3.7x1.8 3.2x3.2x1.5
L (H)
2.2020% 0.060 1.0030% 0.040 2.2020% 0.048 1.0023% 0.062
Table 2 - Recommended Inductors COUT Selection The internal voltage loop compensation in the SC183C limits the minimum output capacitor value to 22F if using an inductor value of 2.2H or 44mF if using an inductor of 1H. This is due to its influence on the the loop crossover frequency, phase margin, and gain margin. Increasing the output capacitor above this minimum value will reduce the crossover frequency and provide greater phase margin. The total output capacitance should not exceed 50mF to avoid any start-up problems. For most typical applications it is recommended to use an output capacitance of 22mF to 44mF. When choosing the output capacitor's capacitance, verify the voltage derating effect from the capacitor vendors data sheet. Capacitors with X7R or X5R ceramic dielectric are recommended for their low ESR and superior temperature and voltage characteristics. Y5V capacitors should not be used as their temperature coefficients make them unsuitable for this application. The output voltage droop due to a load transient is determined by the capacitance of the ceramic output capacitor. The ceramic capacitor supplies the load current initially until the loop responds. Within a few switching cycles the loop will respond and the inductor current will increase to match the required load. The output voltage droop during the period prior to the loop responding can be related to the choice of output capacitor by the relationship from Equation 4.
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SC183C
Applications Information (continued)
COUT = 3 I LOAD VDROOP f OSC
(4)
tor should be placed as closely as possible to the PVIN and PGND pins of the SC183C.
Rated Voltage (VDC) Value at 3.3V (F) 4.74 4.05 6.57 20.3 Dimensions LxWxH (mm) 2.0x1.25x1.25 (EIA:0805) 2.0x1.25x0.85 (EIA:0805) 2.0x1.25x1.25 (EIA:0805) 3.2x1.6x1.6 (EIA:1206)
The output capacitor RMS current ripple may be calculated from Equation 5.
I COUT ( RMS ) = 1 VOUT (VIN ( MAX ) - VOUT ) L f OSC VIN 2 3
(5)
Manufacturer Part Nunber Murata GRM21BR60J106K Murata GRM219R60J106K Murata GRM21BR60J226M Murata GRM31CR60J476M
Value (F)
Type
1010% 1010% 2220% 4720%
X5R X5R X5R X5R
6.3 6.3 6.3 6.3
Table 3 lists the manufacturers of recommended output capacitor options.
CIN Selection
The SC183C source input current is a DC supply current with a triangular ripple imposed on it. To prevent large input voltage ripple, a low ESR ceramic capacitor is required. A minimum value of 4.7F should be used. It is important to consider the DC voltage coefficient characteristics when determining the actual required value. It should be noted that a 10mF, 6.3V, X5R ceramic capacitor with 5V DC applied may exhibit a capacitance as low as 4.5mF. To estimate the required input capacitor, determine the acceptable input ripple voltage and calculate the minimum value required for CIN from Equation 6.
VOUT 1 - VIN = V - ESR f OSC I OUT VOUT VIN
Table 3 - Recommended Capacitors
C IN
(6)
The input capacitor RMS ripple current varies with the input and output voltage. The maximum input capacitor RMS current is found from Equation 7.
I CIN ( RMS ) = VOUT VIN VOUT 1 - VIN
(7)
The input voltage ripple and RMS current ripple are at a maximum when the input voltage is twice the output voltage or 50% duty cycle. The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the PMOS switch. Low ESR/ESL X5R ceramic capacitors are recommended for this function. To minimise stray inductance, the capaci(c) 2010 Semtech Corp. 16 www.semtech.com
SC183C
Applications Information (continued)
SC4633 Soft Start
A
Stage 0
Stage 1
B
Stage 2
C
G F H
Stage 3
Stage 5
D
Stage 4
I
Stage 6
E
Figure 3 -- Typical Diagram of Soft Start Operation
SC183C/SC283/SC4633 Over Current Protection
J
Stage 6
Stage 7
K
Stage 8
M
L
Figure 4 -- Typical Diagram of Current Limit Protection
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SC183C
Applications Information (continued)
PCB Layout Considerations
The layout diagrams in Figure 5 and Figure 6 show a recommended PCB layout for a standard VOUT option and an adjustable VOUT option, respectively. Fundamental layout rules must be followed since the layout is critical for achieving the performance specified in the Electrical Characteristics table. Poor layout can degrade the performance of the DC-DC converter and can contribute to EMI problems, ground bounce, and resistive voltage losses. Poor regulation and instability can result. The following guidelines are recommended when developing a PCB layout:
GND L VIN VOUT
CIN
GND CTLx
U1
COUT
GND
(a) Top layer for standard volatge option
1. The input capacitor, CIN, provides a low impedance loop for the pulsed currents present at the buck converter's inputs. CIN should therefore be placed as close to the PVIN and PGND pins as possible, and no more than 3mm away from the PVIN pin. Place the CIN and SC183C on the same component side to eliminate the use of vias between CIN and the device pins. Use short wide traces or a copper plane to connect as closely to the IC as possible. Use multiple vias for the ground connection to the ground plane to reduce the parasitic inductance. These measures will minimize EMI and input voltage ripple by localizing the high frequency current pulses. 2. Keep the LX pin traces as short as possible to minimize pickup of high frequency switching edges to other parts of the circuit. COUT and L should be connected as close as possible between the LX and GND pins, with a direct return to the GND pin from COUT. 3. Route the output voltage feedback/sense path away from the inductor and LX node to minimize noise and magnetic interference. 4. Use a ground plane referenced to the SC183C PGND pin. Use several vias to connect to the component side ground to further reduce noise and interference on sensitive circuit nodes. 5. If possible, minimize the resistance from the VOUT and AGND pins to the load. This will reduce the voltage drop on the ground plane and improve the load regulation. And it will also improve the overall efficiency by reducing the copper losses on the output and ground planes.
VOUT
VIN
GND
(b) Bottom layer for standard voltage option Figure 5 -- Recommended PCB Top & Bottom Layer Layout for Standard VOUT Option
L
VOUT
VIN
CIN GND
U1
COUT GND CTLx
(a) Top layer for adjustable voltage option
GND VOUT VIN
RFB1 GND RFB2 CFF
(b) Bottom layer for adjustable voltage option Figure 6 -- Recommended PCB Top & Bottom Layer Layout for Adjustable VOUT Option
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SC183C
Outline Drawing - 3x3 MLPQ-UT16
A D B
DIM
A A1 A2 b D D1 E E1 e L N aaa bbb
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.024 .002 (.006) .007 .009 .012 .114 .118 .122 .061 .067 .071 .114 .118 .122 .061 .067 .071 .020 BSC .012 .016 .020 16 .003 .004 .020 .000 0.60 0.05 (0.152) 0.18 0.23 0.30 2.90 3.00 3.10 1.55 1.70 1.80 2.90 3.00 3.10 1.55 1.70 1.80 0.50 BSC 0.30 0.40 0.50 16 0.08 0.10 0.50 0.00
PIN 1 INDICATOR (LASER MARK)
E
A2 A aaa C A1 D1 e/2 LxN E/2 E1
2 1 N
C
SEATING PLANE
e D/2
NOTES: 1. 2. 3. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DAP IS 1.90 x 1.90mm.
bxN bbb CAB
Land Pattern - 3x3 MLPQ-UT16
H R
DIM
(C) K G Z
DIMENSIONS INCHES MILLIMETERS
(.114) .083 .067 .067 .020 .006 .012 .031 .146 (2.90) 2.10 1.70 1.70 0.50 0.15 0.30 0.80 3.70
Y X P
C G H K P R X Y Z
NOTES: 1. 2. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
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SC183C
(c) Semtech 2010 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER'S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com
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